LDj3SNuD 430ba6da65 CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) ... * Add Pmull_V Sse fast path only, both "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. * Add Clmul fast path for the 128 bits variant. * Small optimisation (save 60 instructions) for the Sse fast path about the 128 bits variant. * Add slow path, both variants. Fix V128 Shl/Shr when shift = 0. * A32: Add Vmull_I P64 variant (slow path); not tested. * A32: Add Vmull_I_P8_P64 Test and fix P64 variant.		2021-01-04 23:45:54 +01:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs	Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)	2020-12-17 20:43:41 +01:00
InstEmitAluHelper.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs
InstEmitFlow32.cs
InstEmitFlowHelper.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
InstEmitMemory.cs
InstEmitMemory32.cs
InstEmitMemoryEx.cs
InstEmitMemoryEx32.cs
InstEmitMemoryExHelper.cs	Fix register read after write on STREX implementation (#1801)	2020-12-13 12:19:38 -03:00
InstEmitMemoryHelper.cs
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs	Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)	2020-12-17 20:43:41 +01:00
InstEmitSimdArithmetic.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
InstEmitSimdArithmetic32.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs
InstEmitSimdCvt32.cs	CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776)	2020-12-16 20:27:15 -03:00
InstEmitSimdHash.cs
InstEmitSimdHelper.cs
InstEmitSimdHelper32.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
InstEmitSimdLogical.cs
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
InstEmitSimdShift32.cs
InstEmitSystem.cs
InstEmitSystem32.cs
InstName.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
NativeInterface.cs	PPTC Follow-up. (#1712)	2020-12-17 20:32:09 +01:00
SoftFallback.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
SoftFloat.cs