This website requires JavaScript.
Explore
Help
Sign In
Creepso
/
GreemDev-Ryujinx
Watch
1
Star
0
Fork
You've already forked GreemDev-Ryujinx
0
mirror of
https://github.com/GreemDev/Ryujinx.git
synced
2025-08-30 07:25:05 +00:00
Code
Issues
Projects
Releases
Packages
Wiki
Activity
Actions
63345a3098
GreemDev-Ryujinx
/
ARMeilleure
/
Decoders
History
gdkchan
e5858e2c7d
Add a limit for the number of instructions in a function (
#843
)
2019-12-14 18:18:51 -03:00
..
Block.cs
Condition.cs
DataOp.cs
Decoder.cs
Add a limit for the number of instructions in a function (
#843
)
2019-12-14 18:18:51 -03:00
DecoderHelper.cs
Implemented fast paths for: (
#841
)
2019-12-07 13:45:32 +01:00
InstDescriptor.cs
InstEmitter.cs
IntType.cs
IOpCode.cs
IOpCode32.cs
IOpCode32Alu.cs
IOpCode32BImm.cs
IOpCode32BReg.cs
IOpCode32Mem.cs
IOpCode32MemMult.cs
IOpCodeAlu.cs
IOpCodeAluImm.cs
IOpCodeAluRs.cs
IOpCodeAluRx.cs
IOpCodeBImm.cs
IOpCodeCond.cs
IOpCodeLit.cs
IOpCodeSimd.cs
OpCode.cs
OpCode32.cs
OpCode32Alu.cs
OpCode32AluImm.cs
OpCode32AluRsImm.cs
OpCode32BImm.cs
OpCode32BReg.cs
OpCode32Mem.cs
OpCode32MemImm.cs
OpCode32MemImm8.cs
OpCode32MemMult.cs
OpCodeAdr.cs
OpCodeAlu.cs
OpCodeAluBinary.cs
OpCodeAluImm.cs
OpCodeAluRs.cs
OpCodeAluRx.cs
OpCodeBfm.cs
OpCodeBImm.cs
OpCodeBImmAl.cs
OpCodeBImmCmp.cs
OpCodeBImmCond.cs
OpCodeBImmTest.cs
OpCodeBReg.cs
OpCodeCcmp.cs
OpCodeCcmpImm.cs
OpCodeCcmpReg.cs
OpCodeCsel.cs
OpCodeException.cs
OpCodeMem.cs
OpCodeMemEx.cs
OpCodeMemImm.cs
OpCodeMemLit.cs
OpCodeMemPair.cs
OpCodeMemReg.cs
OpCodeMov.cs
OpCodeMul.cs
OpCodeSimd.cs
OpCodeSimdCvt.cs
OpCodeSimdExt.cs
OpCodeSimdFcond.cs
OpCodeSimdFmov.cs
Implemented fast paths for: (
#841
)
2019-12-07 13:45:32 +01:00
OpCodeSimdImm.cs
Implemented fast paths for: (
#841
)
2019-12-07 13:45:32 +01:00
OpCodeSimdIns.cs
OpCodeSimdMemImm.cs
OpCodeSimdMemLit.cs
OpCodeSimdMemMs.cs
OpCodeSimdMemPair.cs
OpCodeSimdMemReg.cs
OpCodeSimdMemSs.cs
OpCodeSimdReg.cs
OpCodeSimdRegElem.cs
OpCodeSimdRegElemF.cs
OpCodeSimdShImm.cs
OpCodeSimdTbl.cs
OpCodeSystem.cs
OpCodeT16.cs
OpCodeT16AluImm8.cs
OpCodeT16BReg.cs
OpCodeTable.cs
Add Sli_S/V & Sri_S/V inst.s (fast & slow paths), with Tests. (
#797
)
2019-10-24 20:37:42 -03:00
RegisterSize.cs
ShiftType.cs